This excerpt from the Stanford Emerging Technology Review (SETR) focuses on semiconductors, one of ten key technologies studied in this educational initiative. SETR, a project of the Hoover Institution and the Stanford School of Engineering, harnesses the expertise of Stanford University’s leading science and engineering faculty. Download the full report here and subscribe here for news and updates.

Semiconductors, often in the form of microchips, are crucial components used in everyday physical devices, from smartphones and toasters to cars and lawn mowers. Chips control heating and cooling systems, elevators, and fire alarms in modern buildings. Traffic lights are controlled by chips. On farms, tractors and irrigation systems are controlled by chips. Modern militaries could not function without chips in their weapons, navigation devices, and cockpit life-support systems in fighter jets. The list goes on and on—in every aspect of modern life, chips are essential.

Most chips are involved in the handling of information. Different types of them are specialized for different tasks. Some are processor chips that ingest data, perform computations on the data, and output the results of those computations. Memory chips store information and are used with processors. Still other chips act as interfaces between digital computations and the physical world. 

The growing demand for artificial intelligence (AI) and machine learning is driving innovations in chip fabrication, along with advances in memory technologies and high-bandwidth interconnects such as photonic links, all of which are essential for enhancing computational power, managing energy efficiency, and meeting the increasing data needs of modern applications.

Beyond Moore’s law

Semiconductor manufacturing is the most precise manufacturing process that exists. It is used to advance work in energy and biotechnology in addition to information technology and AI.

For over half a century, information technology has been driven by improvements in the chip fabrication process. In 1965, Intel cofounder Gordon Moore observed that the cost of fabricating a transistor was dropping exponentially with time—an observation that has come to be known as Moore’s law. It’s not a law of physics but rather a statement about the optimal rate at which economic value can be extracted from improvements in the chip fabrication process.

Although Moore’s law is often stated as the number of transistors on a chip doubling every few years, historically what drove this scaling was that the cost of making a chip was mostly independent of the number of components on it. This has meant that every few years, a chip whose size and cost remains approximately the same will have twice the number of transistors on it.

Moore’s law scaling (i.e., the exponential increasing of the number of transistors on a chip) meant that each year one could build last year’s devices for less money than before or could build a more powerful system for the same cost. This scaling has been so consistent that it is widely believed that the cost of computing will always decrease with time. But the future will not look like the past. As the complexity of chips increases, the traditional benefits associated with Moore’s law scaling are diminishing, leading to rising costs in chip manufacturing. The actual cost per transistor started to level off around 2012, and it has not kept up with Moore’s law predictions since then.

The past year has witnessed significant advancements and challenges in the semiconductor industry. For example, increasing demand for computing power driven by artificial intelligence (AI) and machine learning (ML) applications has led to a surge in the development of, and demand for, advanced graphical processing units (GPUs). This has created a strain on both production and energy resources.

Speeding up discovery

The semiconductor industry is poised for significant advancements in coming years, driven by the growing demands of AI, especially ML, and high-performance computing.

The introduction of new technologies, such as 2.5-D integration, chiplets, and photonic interconnects, is expected to play a crucial role in meeting these demands. These innovations will help to enhance performance, increase bandwidth, and improve energy efficiency, addressing the limitations of traditional semiconductor designs.

Emerging memory technologies and advanced manufacturing techniques are also critical for the industry’s growth. Innovations in memory stacking and integration with processors will improve data-transfer speeds and reduce latency, meeting the increasing data requirements of modern applications. The development of advanced materials and transistor architectures will further push the boundaries of semiconductor capabilities, enabling continued miniaturization and enhanced performance.

As Moore’s law reaches its limits, future improvements in computing will rely more on optimizing algorithms, hardware, and technologies for specific applications rather than on general technology scaling. This requires innovation across the entire technology stack, from materials to design methods. However, the industry faces a paradox: the need for radical innovation conflicts with the high costs and long timelines of chip development, which can exceed $100 million and take more than two years.

To address this, the industry must make system-design exploration easier, cheaper, and faster. Researchers are working to ensure that specific design changes to a chip do not require redesign of the entire chip. Solutions include enabling software designers to test custom accelerators without deep hardware knowledge and developing tools for application developers to make small hardware extensions to base platforms. This approach, described in more detail in the inaugural Stanford Emerging Technology Review (SETR 2023), depends on the involvement of major technology firms, which would need to participate in an app store–like model for hardware customization, balancing open innovation with profit motives.

The talent pipeline

A critical challenge facing the US semiconductor industry is its significant talent shortage, particularly in hardware design and manufacturing. For example, the Semiconductor Industry Association projects the number of jobs in the sector in the United States will grow by nearly 115,000 by 2030, to total approximately 460,000. Moreover, it estimates that roughly 67,000, or 58 percent, of these new jobs risk going unfilled at current degree-completion rates. Looking at just the new jobs that are technical in nature, the percentage at risk of going unfilled is higher, at 80 percent. Almost two-thirds of the unfilled jobs would require at least a bachelor’s degree in engineering.

The pipeline of college graduates interested in semiconductors is also troubling. While student interest in hardware seems to be increasing, recent actions, including the voiding of up to $7.4 billion in CHIPS Act funding and the cutting of government funding for research in general, will inevitably shrink the number of new graduates in this area.

Since appropriately trained people are the only real source of new ideas, this trend does not bode well for the industry. Addressing this issue requires more and even closer collaboration among educational institutions, industry, and government to develop programs that attract and train the next generation of semiconductor engineers and researchers.

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